1. Field of the Invention
The present invention relates to a semiconductor chip package, and more particularly, relates to a semiconductor chip package with less system electromagnetic interference (EMI) and an increased amount of input/output connections and better package performance.
2. Description of the Related Art
For semiconductor chip package design, an increased amount of input/output connections for multi-functional chips is required. For a conventional lead frame based semiconductor package, however, the amount of leads for input/output connections of a semiconductor chip are limited. To solve the aforementioned problem, a ball grid array (BGA) semiconductor package has been developed to provide a greater amount of input/output connections through solder balls on the bottom of a package substrate of the semiconductor chip package. Requirements for increased input/output connections can be achieved through a finer ball pitch. Compared with the conventional lead frame based semiconductor package, however, the BGA semiconductor package suffers from poorer yields, poorer thermal dissipation efficiency and higher fabricating costs due to the additional electrical connections to the solder balls.
There are some problems in the conventional lead frame base semiconductor package. For example, if the chip with a decreased size is packaged with the fixed sized lead frame, the longer bonding wires for electrical connections between the chip and the lead frame are needed. However, a bonding problem due to the violation of the maximum length of the gold wires occurs. To solve the aforementioned problem, a costly finer pitch lead frame with inner leads, which provides a closer distance between the lead and the chip, is needed. Additionally, if several bonding wires are needed to couple to the same lead of the lead frame with a finer pitch, a short problem would occur.
Also, there are some problems in the conventional BGA semiconductor package coupled to the printed circuit board (PCB). Usually, function of each of the fingers on the PCB are defined, as pin assignments of the pad of the connecting semiconductor chip package completely comply with a required design rule. The traces of the PCB, which are used to couple to the fingers and the pads, may be disposed on the bottom surface of the PCB for routing convenience, thereby forming splits to isolate from the ground plane on the bottom surface of the PCB. However, if a signal trace on the PCB directly passes over the split, an electromagnetic interference (EMI) problem occurs because the undesired magnetic field increases the coupling coefficient between adjacent signal trace.
A novel semiconductor chip package with an increased amount of input/output connections and fabricating cost between the fabricating cost for lead frame and BGA semiconductor packages is desirable.